{"doi":"10.1109/isscc.2008.4523218","title":"65nm Low-Power High-Density SRAM Operable at 1.0V under 3σ Systematic Variation Using Separate V<sub>th</sub> Monitoring and Body Bias for NMOS and PMOS","abstract":null,"journal":"2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers","year":2008,"id":597361,"datarank":0.47032413238937254,"base_score":3.1354942159291497,"endowment":3.1354942159291497,"self_citation_contribution":0.47032413238937254,"citation_network_contribution":0.0,"self_endowment_contribution":0.47032413238937254,"citer_contribution":0.0,"corpus_percentile":null,"corpus_rank":null,"citation_count":22,"citer_count":0,"citers_with_citation_signal":0,"citers_with_endowment":0,"datacite_reuse_total":0,"is_dataset":false,"is_dataset_confidence":null,"is_data_producer":false,"deposit_databanks":null,"is_oa":false,"file_count":0,"downloads":0,"has_version_chain":false,"published_date":null,"fair_score":null,"fair_percentile":null,"algorithm_id":"datarank_citation_only_1hop_v6","ranking_scope":"data_only","authors":[{"id":1530379,"name":"Noriaki Maeda","orcid":null,"position":1,"is_corresponding":false},{"id":1530380,"name":"Yasuhisa Shimazaki","orcid":null,"position":2,"is_corresponding":false},{"id":1530381,"name":"Kenichi Osada","orcid":null,"position":3,"is_corresponding":false},{"id":1530378,"name":"Masanao Yamaoka","orcid":null,"position":0,"is_corresponding":false}],"reference_count":0,"raw_metadata":{"has_enrichment":true,"resolved":true,"title":"65nm Low-Power High-Density SRAM Operable at 1.0V under 3σ Systematic Variation Using Separate V<sub>th</sub> Monitoring and Body Bias for NMOS and PMOS","abstract":"We design a technique to separately measure the Vth of NMOS and PMOS. This technique is used to determine the body bias of NMOS and PMOS individually. Prototype chips with 1Mb 0.51 mm2 high-density SRAM cells using a 65 nm low-power process are fabricated and achieve 1.0 V operation, even when considering actual Vth variation.","is_dataset_classified":null,"base_score":3.1354942159291497,"endowment":3.1354942159291497,"datacite_reuse_total":0,"file_count":0,"downloads":0,"views":0,"has_version_chain":false,"is_dataset":false,"is_oa":false,"pmid":"23304386","pmcid":null,"openalex_id":"https://openalex.org/W2048420745","authors":[],"funders":[],"total_grants":0,"fwci":null,"citation_percentile":null,"influential_citations":0,"citation_trend":[{"year":2012,"count":2},{"year":2013,"count":1},{"year":2014,"count":1},{"year":2015,"count":1},{"year":2016,"count":2}],"oa_status":"closed","license":null,"oa_locations":[{"url":"http://xplorestaging.ieee.org/ielx5/4497158/4523032/04523218.pdf?arnumber=4523218","host_type":"publisher"},{"url":"https://doi.org/10.1109/isscc.2008.4523218","host_type":""}],"fields_of_study":["Low-power high-performance VLSI design","Semiconductor materials and devices","Advancements in Semiconductor Devices and Circuit Design"],"mesh_terms":[],"keywords":["NMOS logic","PMOS logic","Process variation","Static random-access memory","Power (physics)","Materials science","Variation (astronomy)","Electronic engineering","Computer science","Electrical engineering","Optoelectronics","Transistor","Engineering","Voltage","Physics"],"sdg_mappings":[{"sdg_number":0,"sdg_label":"Affordable and clean energy"}],"linked_datasets":[],"clinical_trials":[],"software_tools":[],"database_accessions":[],"source":"live","citation_network_status":"fetched"},"created_at":"2026-07-28T13:01:02.725246Z","pmid":null,"pmcid":null,"fwci":null,"citation_percentile":null,"influential_citations":0,"oa_status":null,"license":null,"views":0,"total_file_size_bytes":0,"version_count":0,"fair_f":null,"fair_a":null,"fair_i":null,"fair_r":null,"fair_zscore":null,"fair_rationale":null,"fair_model":null,"fair_agent_version":null,"fair_fulltext_source":null,"fair_has_llm":null,"fair_computed_at":null,"clinical_trials":[],"software_tools":[],"db_accessions":[],"linked_datasets":[],"topics":[]}