{"doi":"10.1109/icip.2003.1247190","title":"Exploiting parallelism in media processing using VLIW processor","abstract":null,"journal":"Proceedings 2003 International Conference on Image Processing (Cat. No.03CH37429)","year":null,"id":677407,"datarank":0.10397207708399181,"base_score":0.6931471805599453,"endowment":0.6931471805599453,"self_citation_contribution":0.10397207708399181,"citation_network_contribution":0.0,"self_endowment_contribution":0.10397207708399181,"citer_contribution":0.0,"corpus_percentile":null,"corpus_rank":null,"citation_count":1,"citer_count":0,"citers_with_citation_signal":0,"citers_with_endowment":0,"datacite_reuse_total":0,"is_dataset":false,"is_dataset_confidence":null,"is_data_producer":false,"deposit_databanks":null,"is_oa":false,"file_count":0,"downloads":0,"has_version_chain":false,"published_date":null,"fair_score":null,"fair_percentile":null,"algorithm_id":"datarank_citation_only_1hop_v6","ranking_scope":"data_only","authors":[{"id":1769980,"name":"B. Ozer","orcid":null,"position":1,"is_corresponding":false},{"id":145162,"name":"W. Wolf","orcid":null,"position":2,"is_corresponding":false},{"id":1769978,"name":"T. Lv","orcid":null,"position":0,"is_corresponding":false}],"reference_count":0,"raw_metadata":{"has_enrichment":true,"resolved":true,"title":"Exploiting parallelism in media processing using VLIW processor","abstract":"This paper presents the results of analyzing multimedia applications that have been implemented on a trimedia VLIW processor, TM1300. The TM1300 processor offers several media-specific features, such as multimedia instructions, that experience has shown to be very important for obtaining maximum performance from the VLlW machine. Other researchers have studied the effects of instructions on superscalar machines, but we know of no other work that measures the utilization of real VLIW instruction sets on significant applications. We will study static and dynamic instruction counts, interactions between instructions, and other effects. Our experiments show that a TM1300 processor provides a 5/spl times/ speedup over a single-issue RISC processor in equivalent technology on average and more than 10/spl times/ speedup in best case.","is_dataset_classified":null,"base_score":0.6931471805599453,"endowment":0.6931471805599453,"datacite_reuse_total":0,"file_count":0,"downloads":0,"views":0,"has_version_chain":false,"is_dataset":false,"is_oa":false,"pmid":"21097893","pmcid":null,"openalex_id":"https://openalex.org/W1587025594","authors":[],"funders":[],"total_grants":0,"fwci":0.0,"citation_percentile":0.06944135,"influential_citations":0,"citation_trend":[{"year":2019,"count":1}],"oa_status":"closed","license":null,"oa_locations":[{"url":"https://doi.org/10.1109/icip.2003.1247190","host_type":""}],"fields_of_study":["Parallel Computing and Optimization Techniques","Advanced Data Storage Technologies","Embedded Systems Design Techniques"],"mesh_terms":[],"keywords":["Very long instruction word","Computer science","Speedup","Parallelism (grammar)","Parallel computing","Instruction set","Reduced instruction set computing","Instruction-level parallelism","Media processor","Instructions per cycle","Superscalar","Computer architecture","Computer hardware","Central processing unit","Digital signal processing"],"sdg_mappings":[],"linked_datasets":[],"clinical_trials":[],"software_tools":[],"database_accessions":[],"source":"live","citation_network_status":"fetched"},"created_at":"2026-08-17T04:05:29.876749Z","pmid":null,"pmcid":null,"fwci":null,"citation_percentile":null,"influential_citations":0,"oa_status":null,"license":null,"views":0,"total_file_size_bytes":0,"version_count":0,"fair_f":null,"fair_a":null,"fair_i":null,"fair_r":null,"fair_zscore":null,"fair_rationale":null,"fair_model":null,"fair_agent_version":null,"fair_fulltext_source":null,"fair_has_llm":null,"fair_computed_at":null,"clinical_trials":[],"software_tools":[],"db_accessions":[],"linked_datasets":[],"topics":[]}